Cadence Design Systems, Inc. (CDNS)

280.25 -5.65 (-1.98%) 收市：04:00PM EDT

Cadence Design Systems, Inc.

Building 5
2655 Seely Avenue
San Jose, CA 95134
United States
408 943 1234
https://www.cadence.com

版塊: Technology
行業: Software - Application
全職員工: 11,200

高階主管

名稱	頭銜	支付	行使價	出生年份
Dr. Anirudh Devgan Ph.D.	CEO, President & Director	1.95M	無	1970
Mr. John M. Wall	Senior VP & CFO	1.29M	10.24M	1971
Mr. Aneel Zaman	Senior VP & Chief Revenue Officer	1.3M	1.81M	1969
Dr. Chin-Chi Teng Ph.D.	Senior VP and GM of the Digital & Signoff Group	1.07M	280.1k	1966
Dr. Paul Cunningham Ph.D.	Senior VP & GM of the System and Verification Group	1.08M	無	1978
Mr. Ariel Sella	Co-Founder	無	無	無
Mr. James Haddad	Corporate VP of Corporate Finance & Treasurer	無	無	無
Mr. Richard Gu	Vice President of Investor Relations	無	無	無
Ms. Karna Nisewaner	Senior VP, General Counsel & Corporate Secretary	無	無	1975
Ms. Christina Rooke Jones	Senior Vice President of Global Human Resources	無	無	無

截止 2023年12月31日為止計算的金額，現金賠償則計算至上一個財政年度末止。薪資是指薪俸、獎金等。已行使價是指財政年度期間已行使的期權價值。貨幣為 USD。

描述

Cadence Design Systems, Inc. provides software, hardware, services, and reusable integrated circuit (IC) design blocks worldwide. The company offers functional verification services, including emulation and prototyping hardware. Its functional verification offering consists of JasperGold, a formal verification platform; Xcelium, a parallel logic simulation platform; Palladium, an enterprise emulation platform; and Protium, a prototyping platform for chip verification. The company also provides digital IC design and sign off products, including Genus synthesis and Joules RTL power solutions, as well as Modus DFT software solution to reduce systems-on-chip design-for-test time; physical implementation tools, such as place and route, optimization, and multiple patterning preparation; and Innovus implementation system, a physical implementation system. In addition, it offers custom IC design and simulation products to create schematic and physical representations of circuits down to the transistor level for analog, mixed-signal, custom digital, memory, and radio frequency designs; and system design and analysis products to develop printed circuit boards and IC packages, as well as to analyze electromagnetic, electro-thermal, and other multi-physics effects. Further, the company provides intellectual property (IP) products comprising pre-verified and customizable functional blocks to integrate into customer's ICs; and verification IP with memory models to emulate and model the expected behavior and interaction of standard industry system interface protocols. Additionally, it offers services related to methodology, education, and hosted design solutions, as well as technical support and maintenance services. The company serves consumer, hyperscale computing, 5G communications, mobile, automotive, aerospace and defense, industrial, and life science industries. Cadence Design Systems, Inc. was incorporated in 1987 and is headquartered in San Jose, California.

公司管治

截至 2024年4月1日 止，Cadence Design Systems, Inc. 的 ISS 管治質素評分為 2。 Pillar 分數正在審核中：5；董事會：3；股東權利：1；現金賠償：8。

企業管治評分的資料提供： Institutional Shareholder Services (ISS). 評分將以 1 至 10 分顯示 (與指數或地區相關)。1 分表示較低的管治風險，而 10 分表示較高的管治風險。